Requirements

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Requirements

Each event consists of a 32-bit DWord variable. The two most significant bits indicate the type of an event:

00: Channel in 0 (zero), the nine least significant bits of the first Word variable indicate the input address that generated this event. The second Word variable contains the value of the counter of hundredths of seconds at the moment of this event.

01: Channel in 1 (one), the nine least significant bits of the first Word variable indicate the input address that generated this event. The second Word variable contains the value of the counter of hundredths of seconds at the moment of this event.

10: Overflow in the counter of hundredths of seconds.

11: Syncing and changing of the time base. The 14 least significant bits of the first Word variable contains bits from 16 to 30 of the new base time. The second Word variable contains the 16 least significant bits, from 0 (zero) to 15, of the new base time. This event is periodically activated by the application, as described on topic Requirement.

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